The present invention relates to a nonvolatile semiconductor memory device, and more particularly to a pumping voltage generating circuit employed in a nonvolatile semiconductor memory device.
In nonvolatile semiconductor memory devices, it is usual to apply a wordline voltage, a bitline voltage, and a bulk voltage respective to a wordline, a bitline, and a bulk voltage for programming and erasing operations. Such wordline and bulk voltages are high voltages, over the voltage level typically supplied from the external source (i.e., a power supply voltage). For the purpose of providing the high voltages in excess of the external power supply voltage internally, the nonvolatile semiconductor memory device generally employs a pumping voltage generating circuit therein.
FIG. 1 is a schematic diagram illustrating a conventional pumping voltage generating circuit in a nonvolatile semiconductor memory device. The conventional pumping voltage generating circuit includes a bulk voltage pump 130 generating a bulk voltage VBUK, a wordline voltage pump 140 generating a wordline voltage VPI, and a bitline voltage generator 150 outputting a bitline voltage VPB. When the bulk voltage VBUK, the wordline voltage VPI, and the bitline voltage VPB reach their target voltage levels, a pumping enable confirming circuit 60 generates signals to control program execution.
The bulk voltage VBUK is designed to be about −1V, having a small voltage gap from a ground voltage VSS that is the external supply voltage. Therefore, the bulk voltage VBUK arrives at the target voltage (i.e., −1V) relatively in an earlier time from a driving start time of the bulk voltage pump 130. Otherwise, the wordline voltage VPI, which is designed to be about +10V, has a high voltage gap from a power source voltage VCC (i.e., the external supply voltage). Thus, the wordline voltage VPI reaches its target voltage (+10V) in a longer time from a driving start time of the wordline voltage pump 130.
However, in the conventional pumping voltage generating circuit, the bulk voltage pump 130 and the wordline voltage pump 140 begin to pump their voltages both in response to a pumping enable signal /HVEN. During this pumping interval, the time to reach the target level of the wordline voltage VPI is longer than that of the bulk voltage VBUK.
As a result, a nonvolatile semiconductor memory device employing the conventional pumping voltage generating circuit has a disadvantage of degradation in an overall operation speed because the wordline voltage VPI reaches the target level later than the bulk voltage.